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Assignment-1-BE :-
Question with answer (CO-2):- Coming Soon.......(28/05/2021) 9pm
CO2: Design Biasing Circuit for Bipolar Junction Transistor.
1.Draw the construction and symbol of NPN and PNP transistor and explain unbiased transistor in
detail. Also give details of different operating region of transistor.
2.Explain working of Bipolar Junction Transistor in Active region.
3.Explain Common Base configuration (CB) of transistor in detail with necessary derivation, input
characteristic and output characteristic.
4.Using NPN transistor draw the circuit diagram of Common Emitter configuration (CE configuration) of
transistor and explain it in detail with necessary derivation, input characteristic and output
characteristic
5.What is Base width modulation or Early effect in transistor? Explain it in detail for CB configuration
6.Explain punch through or Reach through effect in transistor for CE configuration
7.Establish the relationship between current gain α, β and 𝛾
8.Establish the relationship between leakage current ICBO and ICEO.
9.Compare CB, CE and CC configuration of transistor
10.Why CE configuration of transistor is most preferred?
11.Define following terms:
(i) Emitter efficiency
(ii) Base transportation factor
(iii) Large signal current gain
(iv) Stability Factors : S, S’, S’’
(v) Thermal Runaway
12.What do you mean by Biasing? What is the need of biasing circuits?
13.Explain the concept DC Load line and Operating point Q. Also derive the equation of operating point Q
for CE configuration.
14.Which are the factors that affects the stability of Q point?
15.List the different types of Transistor Biasing Techniques. Find the Q point of Voltage Divider biasing
technique using necessary derivation.
Numerical/Examples
1.For NPN transistor connected in CE configuration as shown in figure, calculate
transistor currents and 𝜶. Given data are 𝜷 = 100, ICO = 2 x 10-8 mA.
2.For NPN transistor connected in CE configuration as shown in figure, calculate
transistor currents IB, IC, VCE, and PD if 𝜷 = 300.
3.Derive stability factor S for CB and CE configuration of transistor.
4.Find out ends of DC load line for the circuit shown in figure. Also draw the DC
load line for given circuit.
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